Switching power supply secondary synchronous rectification unlock
1. When is the SR (Synchronous Rectifier) turned on and when is it turned off?
(In short, first, we need to look at the BCD chip circuit diagram)
Figure 1
Figure 2
The APR3415 on the secondary side in Figure 1 is the key component of this discussion. Figure 2 shows its internal block diagram. It’s clear that the rectification MOSFET has been integrated into the chip (indicated by the red circle).
So when should this MOSFET be turned on? The logic is simple: it should be turned off when the primary side is active and turned on when the secondary side is active. However, it's not directly controlled by the main controller. So how do we know when to turn it on? Well, when the primary side MOSFET Q1 turns on, based on the polarity of the transformer (the same name end marked with a black dot), the secondary side DRAIN pin becomes positive, so the rectification MOSFET must be turned off at that moment.
When the primary side MOSFET turns off, the polarity reverses, making the DRAIN pin negative. At this point, the rectification MOSFET can be turned on, as shown in Figure 3.
Figure 3
The VDET pin detects the voltage of the DRAIN pin through a resistor, so its potential matches that of the DRAIN pin. When the DRAIN voltage transitions from positive to negative, it drops below a threshold voltage VTHON (0V–1V). Once the VDET pin senses this drop, a fixed delay TDON (70 ns) occurs before the MOSFET is activated. Before it turns on, the body diode continues conducting, causing a large negative voltage on the DRAIN pin (inside the red circle). When the MOSFET turns on, the current flows through it instead of the body diode.
However, things aren’t always smooth. As the secondary side conduction current decreases linearly due to the demagnetization of the inductor, if the freewheeling current reaches zero, the MOSFET must be turned off. But what if the current hasn’t fully dropped yet? If the MOSFET remains on, the secondary capacitor could reverse charge the inductor, causing current to flow backward. This is dangerous, especially if the primary side is turned on while the secondary side MOSFET is still active. Therefore, timing the shutdown of the secondary side MOSFET is critical.
The ideal situation is to turn off the MOSFET when the freewheeling current reaches zero, maximizing efficiency. But in practice, we often turn it off just before the current reaches zero to avoid reliability issues. This trade-off sacrifices some efficiency for stability. The shutdown threshold is called VTHOFF (-20 mV to -5 mV). Once the VDET pin crosses this threshold, the MOSFET is turned off after a fixed delay TDOFF (100 ns). After turning off, the body diode still conducts, creating a large negative voltage (in the purple circle). If the primary side samples the voltage at this time, the output voltage may become unstable. PSR chips also have their own learning mechanisms for voltage sampling, which will be discussed later.
Summary: The SR is turned on when VDET is below VTHON (0V–1V), and turned off when VDET exceeds VTHOFF (-20 mV to -5 mV).
2. How does the rectifier chip differentiate between the primary conduction waveform and ringing?
At first glance, it seems straightforward, but it’s more complex than it looks. When the rectification MOSFET turns on, the DRAIN pin experiences a phenomenon known as “ringing.†If the amplitude of this ringing exceeds VTHOFF, it might cause the MOSFET to turn off prematurely—this is commonly referred to as “turning off too early.†To prevent this, the chip includes a minimum ON time feature, ensuring the MOSFET stays on long enough for the ringing to subside.
Additionally, even if the VDET pin voltage drops below VTHON, there might be ringing during the dead time before the secondary side finishes demagnetizing. This ringing can falsely trigger the MOSFET to turn off. To address this, the chip introduces an area-based detection mechanism. For example, in Figure 4, we see the VDET pin voltage over a full cycle, including the primary conduction phase, secondary demagnetization, and the dead time before the primary turns on again.
Figure 4
Area1 corresponds to the primary side conduction, where the voltage difference (Vdet – Vcc) is multiplied by the on-time (Tonp). Area3 represents the ringing during the dead time. By integrating the voltage over time, the chip can distinguish between these two areas. A comparator then compares the integrator output to a reference voltage to decide whether to turn on the MOSFET.
This integration process helps the chip differentiate between the primary-side signal and the ringing, ensuring accurate control. The threshold voltage is set using a current source and a resistor, allowing precise control over when the MOSFET turns on or off.
3. How is the secondary side voltage monitored?
In many PSR (Primary Side Regulation) charger designs, the system operates in PFM mode. At light or no load, the frequency drops significantly, sometimes to just 100 Hz. This makes voltage regulation challenging. The PSR sampling mechanism works by waiting for the secondary side to demagnetize before detecting the output voltage. However, sudden load changes can cause significant voltage drops, which may not be detected quickly enough.
To solve this, the secondary side chip uses the VCC pin to monitor the output voltage. If the voltage drops below a certain level (e.g., 5.25V), it signals the primary side to increase the pulse frequency. But since the secondary side lacks an optocoupler or a direct connection, the signal is sent through the transformer. When the secondary MOSFET turns on, the secondary inductor clamps the output voltage, allowing the primary side to detect it via the auxiliary winding.
However, turning on the MOSFET too much can cause excessive energy absorption and reverse leakage, leading to failed tests. To avoid this, the chip integrates a high RDSON MOSFET (marked in yellow in Figure 2), connected in series with a resistor to the VDET pin. This allows the chip to send a small signal without overloading the system.
When the output voltage falls below a threshold, the secondary MOSFET pulses periodically, sending a small current through the transformer to the primary side. This wakes up the primary chip, which then sends a small pulse to restore the secondary side voltage. This method reduces standby power consumption and minimizes reliance on dummy loads.
Finally, to ensure the VCC capacitor doesn’t discharge completely, the chip forces a wake-up pulse every 30 ms, regardless of the load. This prevents UVLO (undervoltage lockout) and keeps the system stable. If the output voltage overshoots, the chip uses an internal MOSFET to bleed excess energy, preventing damage and maintaining stability under dynamic conditions.
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