Today's mobile phones are gradually becoming a multi-functional device that combines multiple technologies. They feature Internet access, Wi-Fi connectivity, integrated music playback, GPS navigation, high-quality digital cameras, Bluetooth connectivity, and a standard PC-based interface for developing and adding programs. As handheld devices continue to increase in integration, mobile phone designers are increasingly eager to integrate audio, video, Internet, and navigation services into a single device, and must design products with greater storage capacity and faster peripheral interfaces. In order to support the processing of increasing multimedia data.

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Mobile phone designers have faced tough market challenges in terms of size, power consumption, functionality and price. The need for multimedia features requires more memory and faster connection performance, which directly affects the price and size of mobile devices and limits the range of optional features. While the processor manufacturing process technology node advances approximately every two years, the memory technology is being updated every six months. Mobile designers must therefore strike a balance between creating a stable and mature platform and integrating next-generation features that require more memory and faster interfaces, in an effort to keep overall size, power and cost within a reasonable range.

A similar trend in the personal computer field began in the early 1990s, when peripherals connected to processors changed at a much faster rate than manufacturers released new processors. Intel's solution is to build a South Bridge and a North Bridge between the processor and memory and other peripherals. Using a bridge architecture in a mobile phone is very similar to what is in a PC. In order to distinguish it from the South Bridge and the North Bridge in the PC, this technology is called West Bridge in mobile phones, which gives designers enough flexibility to shorten the design cycle and also to the latest memory and other Provide a reliable, high-speed interface.

Storage requirements for mobile devices

The amount of data that can be transferred in the memory of a mobile device is limited, but the memory can be expanded by introducing a secure digital (SD) card or a multimedia card (MMC) into the architecture. This feature requires very low additional cost, so it has very Attractive.

The preferred memory for mobile devices is NAND flash, which has the advantages of low cost per bit, high density, and small size. The NAND controller implementation defines the available NAND device types as single layer cells (SLC) and multi-level cells (MLC). MLC is becoming more and more popular because it can provide higher density at the same price. Although most of the mobile processors currently supporting NAND support SLC NAND, many processors are also adding MLC memory to save costs as much as possible.

All NAND devices require some kind of controller-side processing overhead to maximize device lifetime. The controller must know how many bad blocks exist (bad block management), some bad blocks are marked by the manufacturer, and other bad blocks are gradually degraded during device use. In order to minimize the number of blocks in the latter case, the controller can use wear leveling technology to achieve uniform writes to the entire memory device. The controller should also use the ECC state machine to manage errors. The level of support for NAND management varies with process nodes (NAND flash is one of the fastest-changing devices in the memory world today).

Most mobile device architectures do not take full advantage of the performance and reliability that NAND flash has, and thus do not provide the deep user experience they deserve. In addition, although the density of flash memory continues to increase, mobile processors cannot keep up. If designers want to maintain the flexibility of removable and embedded memory while maximizing device performance, mobile architectures must support changing NAND flash requirements quickly and efficiently.

Data throughput requirements for multimedia phones

Multimedia applications require the ability to process large amounts of data on both mobile devices and PCs (PCs are typically used to manage multimedia data downloaded to mobile phones). The download is usually done directly between the phone and the PC via a USB cable. Studies have shown that about 80% of users who listen to music on their mobile phones download music through their PCs. Photos, videos, and games are also using the same usage model. To achieve true mobility, you must have the ability to quickly transfer data to mobile devices and provide a large amount of memory on your phone for storing data.

USB is the preferred solution for communication between mobile phones and PCs because it is stable, well-established, and has a high data rate. Although low-speed USB is mainly used for human interface devices such as keyboards and mice, full-speed and high-speed USB can transmit data at rates of 12 Mb/s and 480 Mb/s, respectively. Current mobile processors integrate full-speed USB, but full-speed USB is not enough for the large amount of data transfer required for multimedia applications.

Designers can't wait for processor manufacturers to integrate high-speed USB into next-generation devices. Instead, they use a dedicated USB controller to implement these functions. Unfortunately, the faster the interface, the heavier the burden on the main application processor.

One way to mitigate processor load is to add another processor to communicate with the PC and manage the NAND memory. The advantage of this approach is high performance, but using a second processor increases the price, size, and power consumption of the device. Another approach is to let users use cellular networks for network connectivity and data downloads. However, cellular networks are already crowded and users are not willing to pay for additional data network access costs, not to mention the slow speed, technical complexity and reduced reliability of direct wireless connection compared to PC connections.

Even as manufacturers struggle to integrate new memory and peripheral interfaces into mobile processors, new interfaces are emerging. The 4GB or 8GB SD card will increase to 16GB by the end of this year. NAND flash is becoming more and more powerful in terms of ECC implementation, wear leveling and bad block management. The USB 3.0 overspeed (4.8Gbps) specification is also expected to be completed this year. The designer's challenge is that processors used in mobile systems are too slow to integrate and support in the face of ever-changing technologies.

West Bridge Architecture

The Southbridge and Northbridge used by PCs to solve similar problems a decade ago identified the type of processor currently in use and the type and speed of memory, making processor development independent of the rest of the system. The North Bridge is used to connect the processor to the high-speed graphics bus, includes a memory controller, and is connected to the South Bridge. The South Bridge is used to connect system and serial and parallel I/O peripherals, PCI bus, on-board graphics, and system BIOS.

To solve the data throughput problem in mobile phones, it is necessary to understand the bottlenecks in the current mobile architecture. For example, the phone's main processor needs to connect to the phone's RF module and control the LCD, keyboard, memory, audio and camera, as well as control the connection to the PC and other peripherals. The processor has a lot of tasks to deal with, so reducing their burden can greatly improve device performance and user experience. In this way, the increased pressure due to increased data throughput can be effectively mitigated without the need to add a second processor or increase network traffic.

In order to store a packet to the memory it is connected to, the processor must be interrupted. Once the processor is ready, it transfers the data to the SRAM for caching and then copies it to the storage device. During this process, the processor may be interrupted multiple times to perform higher priority tasks. The processor memory interface can be shared between the USB controller and the storage device. This architecture introduces multiple bottlenecks and the processor must maintain a long duty cycle.

If you want to increase the transfer rate and efficiency, you must remove the processor from the data path. In addition, the data must arrive from the host PC through the direct data path to the memory without bus collision. The bridge solves all of these problems and provides additional functionality without the need for additional processors, thereby reducing congestion on the processor memory bus, allowing the processor to handle other tasks and disconnect the memory technology node. The connection to the processor.

In order to distinguish it from the South Bridge and the North Bridge in the PC, this architecture is called West Bridge, which frees the processor from the data transfer path between the PC and the mobile device, providing users with fast download functions. It also connects to the latest NAND, SD, MMC and HDD memories. Since the bridge replacement cycle is shorter than the CPU, Westbridge can track these technologies faster (supporting connection to the host processor via a standard interface).

The West Bridge creates a direct path from the host PC to the mass storage, and the processor is only interrupted when needed. Westbridge architecture can quickly keep up with the development of NAND flash technology, supporting MLC with ECC, wear leveling and bad block management. The cost of Westbridge is very low compared to adding a second processor. For systems equipped with an additional dedicated high-speed USB controller, the bridge architecture is a logical upgrade that yields significant benefits at a small additional material cost. Even for mobile devices with USB integrated on the processor, the performance and power savings provided by the Westbridge architecture are quite significant.

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